Design and Optimization of n-bit Reversible Binary Comparator
نویسندگان
چکیده
Reversible logic has attracted significance attention in recent years, leading to different approaches such as synthesis, optimization, simulation and verification. In this paper, we propose the design and optimization of n-bit reversible binary comparator. The circuit for MSB and one-bit comparator cell using NOT, PG and CNOT gates are designed. The n-bit reversible binary comparator is designed using circuit for MSB as first stage to compare MSBs and one-bit comparator cell as second stage and so on to compare lesser significant bit positions. The power consumption, delay, garbage outputs and constant inputs are computed. It is observed that the quantum cost and garbage output values are less in the proposed technique compared to the existing approaches.
منابع مشابه
Evolution of structure of some binary group based n bit comparator, n-to-2n decoder by reversible technique
Reversible logic has attracted substantial interest due to its low power consumption which is the main concern of low power VLSI circuit design. In this paper, a novel 4x4 reversible gate called inventive gate has been introduced and using this gate 1-bit, 2-bit, 8-bit, 32-bit and n-bit group-based reversible comparator have been constructed with low value of reversible parameters. The MOS tran...
متن کاملA Novel Approach to Design a 4-Bit Binary Comparator Circuit with Reversible Logic using CDSM Gate
In the recent scenario of microelectronic industry, the reversible logic is considered as the burgeonic technology for digital circuit designing. It deals with the aim to generate digital circuits with zero power loss characteristics. Optical computing, Nanotechnology, Low power CMOS design and Digital Signal Processing (DSP) processors are leading areas of development with the concept of rever...
متن کاملDesign and Implementation of a Two-Bit Binary Comparator Using Reversible Logic
Modern digital circuit designing is now focussing on the reversible circuits. It aims towards the designing of low power loss circuits in the area of nanotechnology, quantum computing, optical computing, signal processing etc. This paper presents an optimized two-bit binary comparator based on reversible logic using Feynman, Toffoli, TR, URG and BJN gates. Optimization of the comparator circuit...
متن کاملA Novel Design of Reversible Multiplier Circuit (TECHNICAL NOTE)
Adders and multipliers are two main units of the computer arithmetic processors and play an important role in reversible computations. The binary multiplier consists of two main parts, the partial products generation circuit (PPGC) and the reversible parallel adders (RPA). This paper introduces a novel reversible 4×4 multiplier circuit that is based on an advanced PPGC with Peres gates only. Ag...
متن کامل4 Bit Comparator Design Based on Reversible Logic Gates
Today, reversible logic circuits has attracted considerable attention in improving some fields like nanotechnology, quantum computing, and low power design. In this paper 4 bit reversible comparator based on classical logic circuit is represented which uses existing reversible gates. In this design we try to reduce optimization parameters like number of constant inputs, garbage outputs, and qua...
متن کامل